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TSV Stacked Memory Patent Landscape Analysis

TSV Stacked Memory Patent Landscape Analysis

In the semiconductor industry, 3D integration using through-silicon via (TSV) has been considered to be a promising way for improving performance and density instead of conventional device scaling. By connecting stacked chips with the TSV vertical connections, the wide bandwidth I/O and reduction of interconnects length can be achieved. Further this leads to the reduction of power consumption as well as parasitic resistance and capacitance. The last 2 years have seen some changes on the TSV memory market with first products appearance (3DS DDR4, HBM, HMC) but also first hot patent litigations between ELM 3DS and microelectronics giants (Samsung Electronics, SK Hynix and Micron Technology). The TSV 3D Memory market to show 43% CAGR to 2020 according to Yole Development, with almost 200K units wafers in 2016.

Samsung started 3DS DDR4 DRAM production in 2014, HBM2 4Gb at the beginning of the year and 8Gb will be introduced later this year. For 2019-2020, Samsung predicts on two future paths: HBM3 with higher capacity and higher bandwidth and low cost HBM (with significant cost savings arrive from the narrower width allowing for simpler memory stacks with less TSVs). SK Hynix entered in production of HBM1 2Gb in 2014 for graphic and cache applications and will commence mass production of HBM2 4Gb in Q3 2016 and 8Gb in Q4 2016 for HPC and server use. SK Hynix started also production of 3DS DDR4 8Gb and Wide I/O2 in 2015. SK Hynix predicts a wider array of purposes for tomorrow new HBM generation. Micron Technology began production of 16Gb HMC Gen2 in 2014 and will start production of HMC Gen3 in 2017. Those products get from low-end applications like networks servers (3DS DDR4) up to high-end computing applications (HMC, HBM).

Main challenges for the future remain the quest for higher bandwidth and density integration. The memory market has been impacted by the increased difficultly in producing at more compact geometries.

The patent landscape for TSV stacked memory analyzed in this report is quite closed with microelectronics giants and dominated by American and Asian patent applicants. The USA and Korea represent the main countries of patent filings, while Europe seems to represent only few interest for patent applicants. First patents involving TSV stacked memories were already published in the 1990s, but the development of the technology really started in the mid-2000s with a significant increase of patent publications since then. To this date, more than 400 patent families relating to TSV stacked memory technology have been published. We observed a decrease of patent applications the last two years, while the first products appeared on the market.


Introduction
The Authors
Scope of the Report
Key Features of the Report
Objectives of the Report
Main Patent Assignee mentioned in the report
Terminology for Patent Analysis
Methodology
Patent Search, Patent Selection, Patent Analysis
Search Equations
Search Operators Segmentation of Patents
Technological Segmentation
Selection of Key Patents
Technology Overview
Executive Summary
Patent Landscape: TSV Stacked Memory General Overview
For each segment:
Time Evolution of Patent Publications
Countries of Patent Filings
Time Evolution by Country of Filing
Main Patent Assignees Ranking
Time Evolution of Patent Assignees
Mapping of Patent Holders & Patent Applicants
Summary of Assignee’s Patent Portfolio
Patent Segmentation
IP Leadership Citation Analysis
Strength Index
IP Blocking Potential
Key Patent Families
Focus on Key Players
For each players (Samsung, Toshiba, Micron Technology, SK Hynix, Intel):
Technology Overview
In-depth Patent Analysis
Key Patents
Focus on Key Challenges
IP Litigation ELM 3DS vs. Samsung, Micron and SK Hynix
Conclusions
Annexes
Knowmade Company presentation Contacts

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