Semiconductor packaging involves casing of materials such as metal, plastic, glass, or ceramic on the silicon wafer. These casings usually contain one or more semiconductor electronic components. A casing protects the silicon wafer against corrosion and impact, clamps the contact pins or leads used to connect the external circuits to the device, and dissipates heat produced in the device. Though packages are usually made in accordance to industry standards, they meet the specifics of an individual manufacturer. Wafer testing is executed during the semiconductor device fabrication. This involves the testing of all individual integrated circuits present on the wafer. The individual circuits are tested for functional defects using special test patterns. The testing is carried out using an equipment called a wafer prober or handler. Testing is also carried out using testing methods such as system level tests and burn-in method.
Technavio's analysts forecast the semiconductor packaging and test market in China to grow at a CAGR of 7.05% by revenue over the period 2014-2019.
Covered in this report
The report covers the present scenario and the growth prospects of the semiconductor packaging and test market in China for 2015-2019 along with a market overview. The market has been segmented and sub-segmented on the following basis: By business type : IDM (integrated devices manufacturers) Outsourced semiconductor assembly and test (OSAT)
Technavio's report, Semiconductor Packaging and Test Market in China in 2015-2019, has been prepared based on an in-depth market analysis with inputs from industry experts. The report focuses on the landscape of semiconductor packaging and test market in China market and its opportunities in the coming years. The report includes a discussion of the key vendors operating in this market.
Key vendors Amkor ASE PowerTech SPIL STATS ChipsPAC UTAC
Key market driver Growth of semiconductor chip application market For a full, detailed list, view our report
Key market challenge Short lifecycle of semiconductor devices For a full, detailed list, view our report
Key market trend Emergence of 3D packaging For a full, detailed list, view our report
Key questions answered in this report What will the market size be in 2019 in terms of both revenue and unit shipments and what will the growth rate be What are the key market trends What is driving this market What are the challenges to market growth Who are the key vendors in this market space What are the market opportunities and threats faced by the key vendors
Technavio Announces the Publication of its Research Report Semiconductor Packaging and Test Market in China 2015-2019
Technavio recognizes the following companies as the key players in the Semiconductor Packaging and Test Market in China: Amkor Technology, ASE, Powertech Technology, Siliconware Precision Industries (SPIL), STATS ChipPAC and UTAC
Other Prominent Vendors in the market are: ChipMos, Greatek, Huahong, JCET, KYEC, Lingsen Precision, Nepes, SMIC, Tianshui Huatian, and Unisem.
Commenting on the report, an analyst from Technavios team said: Use of 3D technology for packaging is becoming popular due to demand from electronic goods manufacturers to reduce the space occupied by chips. This is likely to increase performance, as multiple chips will be stacked together. Growth of the local outsourced semiconductor assembly and testing (OSAT) companies and the use of fan-out wafer level packaging (FOWLP) technology is gaining traction in the market as well.
According to the report, rapid expansion of semiconductor chip application with growing demands from industries such as power, energy, medical, green cars, networking and telecommunications, LED lighting, automobile, consumer applications, military, aerospace and defense, motor control applications, and robotics will drive the market over the forecast period.
Further, the report states that the small life span of the packaging equipment may act as a challenge because the technology used to manufacture semiconductor chips is upgraded constantly and is more optimized.