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Emerging Trends in Structured ASIC/FPGA Technologies Impacting the Electronics Market (Technical Insights)Published by: Frost & Sullivan Published: Jun. 29, 2005 Table of Contents1. Executive Summary 1. Scope and Methodology 1. Scope of the Research Service 2. Research Methodology 2. Key Findings 1. Noteworthy Emerging Technologies and Trends 2. Noteworthy Applications and Trends 2. Technology and Applications Viewpoint 1. Structured ASIC Technology Impact Analysis 1. IC Design--A Technology Primer 2. Structured ASIC--'An Innovative Design Solution for the Future' 3. Structured ASIC Architecture and Design Flow 4. Applications Viewpoint 5. Are Platform ASICs and Structured ASICs the Same ? 6. Assessment of Competing Technologies 7. Structured/Platform ASIC--Key Developers 8. Structured ASIC--EDA Tool Developers 2. FPGA Technology Impact Analysis 1. FPGA Design--A Technology Primer 2. Emerging Trends in FPGA Design 3. Applications Viewpoint 4. FPGA--Key Developers 3. Industry Trends 1. ASIC--FPGA--Structured ASIC--A Comparison 2. Choosing the Right Design Solution--ASIC? FPGA? or Structured ASIC? 3. Technology Adoption Factor Analysis 1. Structured ASIC Technology--Drivers and Challenges 1. Growth Drivers a. Shrinking feature size demands innovative design solutions for next generation electronics b. Increased integration drives structured ASIC market c. Value added benefits of FPGA and ASIC in a single design d. Medium volume market to accelerate the need for structured ASIC designs e. Value-added applications drives the structured ASIC market 2. Technology Challenges a. DSM fabrication issues at and below 65 nm b. User acceptance of novel designs c. Critical business chain breakdowns such as IP licensing is a key issue d. Fab logistics may cause production delays 2. Field Programmable Gate Arrays--Drivers and Challenges 1. Growth Drivers a. Shrinking device dimensions and value added benefits fuel the need for FPGAs b. Soaring mask costs continues to drive ASIC opportunities to FPGAs c. Emerging communications and digital computing markets likely to fuel the demand for novel FPGA design solutions d. Increased integration of analog functionality into the digital world e. Faster TTM to maneuver FPGA growth f. High-end volume market drives the demand for sub-100 nm FPGAs 2. Technology Challenges a. Finding the right trade-offs between density, performance and power consumption at advanced nodes b. Overall acceptance of structured ASIC might hamper the growth of FPGA market c. Challenges on the EDA front might restrict FPGAs d. Staggering high unit costs for large volumes curbs FPGA demand e. Transition from cell-based ASICs to FPGAs challenges designers with verification and timing closure issues 4. Assessment of Global Innovation and Opportunities 1. Design View from North America 1. Novel Structured ASIC Design Boosts Mixed-Signal Integration 2. High Density/Low Cost FPGA Design for Next-Gen Devices 3. Novel Programmable/Re-Programmable Solutions Boost Electronics Industry 4. Keeping Moore's Law on Track 5. Structured ASIC--A Novel Design Breed for the Future 6. Novel Design Solution for Deep Sub-Micron Designs 7. Low Cost and High Performance RapidChip Platform ASIC Solution 8. Custom ASICs Come to Rescue of Next-Gen Designs 9. Providing the Missing Link between FPGAs and ASICs 10. Hybrid Design Approach Combines ASIC and FPGA Benefits 11. Structured ASIC Boosts System Designers 12. Novel Design Automation Tools and Technologies Aid Physical Implementation of Structured ASICs 2. Design View From Asia-Pac and Europe 1. eFPGA Adds ‘On-Silicon’ Logic Programmability to ASIC/SoC Design 2. Filling the Gap between Standard Cell ASICs and FPGAs 3. An Alternative Solution to Cell-Based ASICs and FPGAs 4. Novel Cost-Effective Design Architecture Enables Faster Design and Production Time 3. Global R&D Developments 1. Semiconductor Giant Goes Small 2. High Performance Re-Programmable Switch 3. FPGA-Based System Integration 5. Patent Analysis and Database of Key Industry Participants 1. Patent Analysis 1. Assessment of Patents in ASIC/FPGA Sector 2. Key Patents Related to ASIC/FPGA Sector 2. Database of Key Industry Participants 1. Corporates 2. Universities/Research Labs 6. Frost and Sullivan 2005 Science and Technology Awards 1. Frost and Sullivan Award for Technology Innovation 1. Award Description 2. Award Recipient 2. Frost and Sullivan Award for Product Leadership 1. Award Description 2. Award Recipient 3. Frost and Sullivan Award for Excellence in Technology 1. Award Description 2. Award Recipient 7. Critical Reference Tables 1. Decision Support Database Tables 1. Global Cellular Handsets Installed Base (1999 to 2006) 2. Global Semiconductor and Semiconductor Equipment Market (1999 to 2006) 3. Total Portable PC Installed Base (1999 to 2006) 4. Unit Shipment of Digital Cameras--North America (1999 to 2009) 5. Unit Shipment of Camcorders--United States (1999 to 2009) 6. Unit Shipment of PDAs--North America (1999 to 2009) AbstractShrinking Process Geometries Demand Innovative Design SolutionsThe integrated chip (IC) industry’s aim to reduce chip size to nanoscale dimensions and improve performance while keeping development costs to a minimum drives the need for novel design platforms such as structured application-specific integrated circuits (ASICs). This design platform combines the best of ASICs and field programmable gate arrays (FPGAs) and is expected to support rapid innovations in microelectronic technology and meet the growing demand for shrinking and high-performance electronic products. A key driver for structured ASICs is likely to be its use of embedded intellectual property (IP) and specialized analysis/design techniques that simplify the physical design process greatly. This Frost & Sullivan research service reviews the advancement and promising areas in the field of IC design as well as the emergence of structured/platform ASICs in the semiconductor industry. It also focuses on the various chip design methodologies prevalent today and places major emphasis on emerging IC design technologies. The study distinguishes itself by focusing on user concerns by examining the practical and pragmatic applications of advanced ASIC technologies that address real-world issues and problems, and provides tangible benefits. Need of the Hour - A Cost-effective IC Design Solution In the past, the IC industry has had to cope with the skyrocketing fabrication equipment cost of high-end FPGAs. Fortunately, structured/platform ASICs have emerged as the ideal low-cost design solutions for medium-volume (10,000 chips to 50,000 chips a year) applications. "The structured ASICs combine the cost advantage of ASICs and the low-risk nature of FPGAs to meets the rising demand for a flexible design solution that creates cost-effective and shorter time-to-market products," explains the analyst of this research service. The structured/platform ASICs also cut the nonrecurring engineering (NRE) expenses by more than 85.0 per cent in derivative chips and is therefore, becoming imperative for upcoming deep sub-micron designs. Value-added Applications Drive Structured ASICs The initial target markets for structured ASICs are likely to be for those applications such as telecommunications, data storage, and digital computing, and networking that demand high performance, but require modest production volumes. "New electronic products are constantly introduced in the market and achieving IC customization with low-cost and increased complexity is driving the need for novel structured ASIC designs," observes the analyst. A significant portion of demand for structured ASIC products is also likely to stem from the communications industry, with the majority of applications being in the networking, wireless, and wired communications as well as mobile base station segments.
Further, the structured ASIC technology is capable of supporting many of today’s demanding system-on-chip (SoC) applications because of its unique configurable nature along with the availability of high-speed block RAMs, and mask programmable input/output as well as its ability to support soft, synthesizable IP.
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